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发表于 2015-11-8 21:22:36
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Institute of Microelectronics of Chinese Academy of Sciences. Working with senior colleagues, I was mainly responsible building the frequency input control part of the whole scanner using zc702 demoboard In the process of development, I firstly programmed VerilogHDL sequential logic in ISE according to the corresponding input of different frequencies. After simulating with testbench, and the synthesis result identified with ideal waveform, I generate user files and UCF file to allocate FPGA pins, and laid out the design into FPGA board. Lastly, I connected the board to the test module, changed input and measured output frequency, thus modified program according to the differences between results and ideal to finally obtain the FPGA board with correct user files. During the two-month internship, I applied the knowledge of embedding and Verilog Language into experiment, and with the whole procedure being conducted independently numbers of times, I was gradually equipped with knowledge and experience which could be of use in more complex designing in the future.
Furthermore, I gained much experience in Verilog programming and debugging, which is totally different with that of C. C allows people to program through different angles, conducting different programs to acheive the same function, while in Verilog there always exist a single access, which required people a more rigorous programming mind. |
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